1. Field of the Invention
The present invention relates to a semiconductor memory device and a fabrication method therefor, and more particularly, to a ferroelectric random access memory (FRAM) device and a fabrication method therefor.
2. Description of the Related Art
A ferroelectric material has a ferroelectricity. The ferroelectricity is a physical property in which if an external voltage is applied to electric dipoles arranged in the ferroelectric material, a spontaneous polarization of the electric dipoles is generated. A remnant polarization of some constant level remains even after the external electric field is removed. When the remnant polarization of the ferroelectric material is used for storing data, the data can be stored without an external voltage. Also, application of a reverse external field causes polarization in the opposite direction.
The FRAMs using the ferroelectric material are largely classified into two types; a first type which operates by detecting a change in a charge amount stored in a ferroelectric capacitor, and a second type which operates by detecting a change in resistance of a semiconductor due to spontaneous polarization of the ferroelectric material. The first type is typically adapted to a structure in which a unit cell is constituted by one capacitor and one transistor. Particularly, this first type is widely applied to a DRAM, such that a thick interlayer insulating layer is formed on a CMOS structure and a ferroelectric capacitor is formed thereon.
The second type is typically adapted to a metal ferroelectric metal insulator semiconductor (MFMIS) field effect transistor (FET) structure. In the MFMIS FET structure, a unit cell is constituted by one transistor.
The structures of both types have a ferroelectric capacitor structure formed by depositing a lower metal layer/a ferrorelectric layer/an upper metal layer. The most widely used ferroelectric capacitor is a ferroelectric layer using PZT (Pb(Zr.sub.x Ti.sub.1-x) O.sub.3). The PZT (Pb(Zr.sub.x Ti.sub.1-x) O.sub.3) is used because its Curie temperature is relatively high, i.e., 230.about.490.degree. C., it has different crystalline phases according to Zr/Ti composition and temperature, and it has a high dielectric constant.
However, in the conventional capacitor having a structure of a lower metal layer-PZT layer-upper metal layer, an imprint phenomenon in which a hysteresis curve moves toward a positive or a negative direction along an electric field axis occurs. If the imprint phenomenon occurs, the absolute values of positive and negative coercive voltages become different from each other, which destroys symmetry and reduces a remnant polarization value Pr.
The imprint phenomenon is caused by a difference in characteristics between an upper interface between the upper metal layer and PZT layer and a lower interface between the lower metal layer and PZT layer. This difference in characteristics is caused by a thermal treatment of the PZT layer. In other words, after the PZT layer is deposited on the lower metal layer, if the PZT layer is thermally treated for crystallization, Pb present in the PZT layer moves toward the interface adjacent the lower metal layer, thereby changing the interface characteristics. However, since the upper metal layer is formed on the thermally treated PZT layer, the upper layer does not experience such a change as the lower metal layer. Thus, the upper and lower interfaces of the PZT layer become different in their characteristics, causing the imprint phenomenon.